Implementation of Full Adder using Cmos Logic
Journal Title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) - Year 2017, Vol 5, Issue 7
Abstract
this paper gives an insight into the use of Complementary Metal Oxide Semiconductor (CMOS) logic which can be made use of to implement various circuits, both combinational and sequential. In this paper, full adder, having three inputs is simulated with the help of P Spice software, and the output waveforms are recorded. CMOS ICs have gained recognition all over the world ,due to its power handling capacity, small size and increased speed.
Authors and Affiliations
Ravika Gupta
Keywords
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