FPGA Based Implementation of Genetic Algorithm Using VHDL

Journal title: International Journal of Electronics Communication and Computer Technology

Authors: Vikas Gupta| Electronics &Communication T.I.T Bhopal, India vgup24@yahoo.com, Anshuj Jain| Electroni...

Subject(s): Computer and Information Science, Engineering

Reduced Area and Improve Delay Module Design of 64 × 16 RAM

Journal title: International Journal of Electronics Communication and Computer Technology

Authors: Raj Kumar Mistri| Department of Electronics & Communication Engineering, RTCIT, Ranchi, Jharkhand, I...

Subject(s): Computer and Information Science, Engineering

Implementation of UART Using VHDL

Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET)

Authors: Indu Chauhan

Subject(s): Engineering, Applied Linguistics

16 BIT UNSIGNED MULTIPLIER USING PROPOSED CSLA

Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET)

Authors: Praveen B S, Manjunanth Badiger

Subject(s): Engineering, Applied Linguistics

Analysis and Optimization of Level Cache

Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET)

Authors: Swati V. Kakde, Mayuri Chawla

Subject(s): Engineering, Applied Linguistics

Implementation of Enhanced NOC Router

Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET)

Authors: Pallavi B V, Dr.Baswaraj Gadgay, Veeresh Pujari, Vivekanand Bonal

Subject(s): Engineering, Applied Linguistics

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