12Bit, 80MHz, 230mW Pipeline ADC using 3Bit Flash ADC

Journal Title: International Journal of Science and Research (IJSR) - Year 2015, Vol 4, Issue 4

Abstract

"This work describes a 12-bit multibit-per-stage pipeline analog-to-digital converter (ADC) by using 3bit flash type ADC. Pipeline ADCs are the architecture of choice for ADCs used in such wireless communication systems. The Supply voltage for this Pipelined ADC is ±3.3V for 0.18µm Technology. The Characterization of Pipelined ADC is done in terms of SNDR, ENOB, INL, DNL, Power dissipation. The Simulation Result shows that the Sampling Rate is 80MS/s with power Dissipation of 230mW wasachieved in 0.18µm technology. The easured SNDR is 62.21dB, ENOB is 10.041bit, DNL is 0.2049LSB and INL is 0.4067LSB 0.18µm Technology."

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  • EP ID EP366358
  • DOI -
  • Views 142
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How To Cite

(2015). 12Bit, 80MHz, 230mW Pipeline ADC using 3Bit Flash ADC. International Journal of Science and Research (IJSR), 4(4), -. https://europub.co.uk/articles/-A-366358