3-D Field Programmable Gate Interconnect Faults by Testing and Diagnosis

Abstract

The emerging three-dimensional (3D) integration technology is one of the promising solutions to overcome the barriers in interconnect scaling, thereby offering an opportunity to continue performance improvements using CMOS technology. As the fabrication of 3D integrated circuits has become viable, developing CAD tools and architectural techniques are imperative for the successful adoption of 3D integration technology. A brief introduction on the 3D integration technology has been proposed, and then reviewed the EDA challenges and solutions that can enable the adoption of 3D ICs, and finally presented the design and architectural techniques on the application of 3D ICs, including a survey of various approaches to design future 3D ICs, leveraging the benefits of fast latency, higher bandwidth, and heterogeneous integration capability that are offered by 3D technology.

Authors and Affiliations

Velpuri Jagathi

Keywords

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  • EP ID EP19990
  • DOI -
  • Views 267
  • Downloads 4

How To Cite

Velpuri Jagathi (2015). 3-D Field Programmable Gate Interconnect Faults by Testing and Diagnosis. International Journal for Research in Applied Science and Engineering Technology (IJRASET), 3(3), -. https://europub.co.uk/articles/-A-19990