A 65nm Technology CMOS Inverter
Journal Title: International Journal of Engineering and Science Invention - Year 2018, Vol 7, Issue 5
Abstract
The inverter is the backbone of any digital circuit which can perform Boolean operation on the single input variable. At present world low power device design and its implementation have got a significant role in the field of nano -electronic circuits. In this paper we have optimized the CMOS inverter design in 65nm technology and verified its operation using cadence virtuoso tool.
Authors and Affiliations
S Rahul
Keywords
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- EP ID EP396996
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