A Comparative Performance Analysis of Various CMOS Design Techniques for XOR and XNOR Circuits

Abstract

XOR and XNOR gates play an important role in digital systems. XOR & XNOR logic gates are basic building blocks of many arithmetic circuits. The XOR and XNOR circuit is implemented in pass transistor logic, static CMOS logic, transmission gate logic. The design of the XOR & XNOR circuits based on TSMC 32nm process models at the supply voltage 0.9V is simulated using HSPICE. Due to low power consumption and high speed these design circuits are suitable for arithmetic operations and VLSI applications. Hence comparison of delay & power is obtained in this paper for various design techniques of logic gates.

Authors and Affiliations

Aditi Joshi , Chanchal Jain , Pooja Choudhary, Chirag Arora, Krishan Rapswal

Keywords

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  • EP ID EP23947
  • DOI http://doi.org/10.22214/ijraset.2017.4241
  • Views 333
  • Downloads 11

How To Cite

Aditi Joshi, Chanchal Jain, Pooja Choudhary, Chirag Arora, Krishan Rapswal (2017). A Comparative Performance Analysis of Various CMOS Design Techniques for XOR and XNOR Circuits. International Journal for Research in Applied Science and Engineering Technology (IJRASET), 5(4), -. https://europub.co.uk/articles/-A-23947