A METHOD OF REDUCING SWITCH COUNT IN THREE-LEVEL NPC INVERTER – ANALYSIS IN STEADY STATES
Journal Title: Power Electronics and Drives - Year 2017, Vol 2, Issue 2
Abstract
The aim of the paper is to present a proof of concept for a new method of modulation which reduce switch count in three-level neutral point clamped (3L-NPC) inverter. The method is an implementation of space vector modulation (SVM) that uses a prediction algorithm and sequences of transistors, which are not common in use. Those sequences make active use of clamping diodes of the inverter. The prediction algorithm analyzes possible sequences of transistors’ states and choose those which offers smaller switch count. Measurements of steady states were taken on prototype 3L-NPC. Results and analysis are presented in this paper.
Authors and Affiliations
Krzysztof Rogowski, Ryszard Beniak
Keywords
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- EP ID EP408025
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