A New Modular Multilevel Inverter Topology of Reduced Components
Journal Title: International Journal of Science Engineering and Advance Technology - Year 2017, Vol 5, Issue 4
Abstract
Harmonic content of the yield voltage waveform diminishes as the quantity of yield voltage level increments. The primary focal points are lower Total Harmonic Distortion (THD), less weight on the power switches and higher proficiency. Be that as it may, increment in the gadget number because of expanded voltage levels makes the control strategy complex and subsequently costly. This venture displays a nine level inverter with lessened DC sources which is equipped for acquiring all added substance and subtractive mixes of information DC levels. This topology requires less power changes contrasted with regular multilevel inverter and less entryway drives. The proposed topology is exhibited through a ninelevel inverter with a proper balance plot and definite reproduction has been done in MATLAB/Simulink. A correlation is made between proposed topology and the customary multilevel topology on the premise of gadget include, number of levels the yield voltage and THD.
Authors and Affiliations
P Venkateswara Rao| PG Student, Department of EEE, Pydah College of Engg, Kakinada, India, S Hema Supriya Reddy| Asst.Professor, Department of EEE, Pydah College of Engg, Kakinada, India
Keywords
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