Abstract

Abstract—CMOS Dynamic latched comparators are preferred because they use Positive feedback mechanism with two backto-back cross coupled inverters to convert a small input voltage difference to a supply voltage level in a short time. In this paper we adopted a kickback noise reduction technique which uses Exclusive OR gate in between regenerative nodes and inputs. To validate the results of our proposed design, it was compared with previous works like Single-tail Dynamic Comparator and Double-tail Dynamic Comparator using Mentor Graphics Design Tool with 130 nm technology. The proposed design can be used for the application of SAR ADC in Implantable Biomedical Devices. Index Terms—Kickback noise, single tail dynamic comparator, and double tail dynamic comparator.

Authors and Affiliations