A Novel Virtual Grounding Based Read-Error Reduction Technique in SRAM
Journal Title: International Journal of Research in Computer and Communication Technology - Year 2013, Vol 2, Issue 7
Abstract
In this paper we are going to modify the Schmitt Trigger based SRAM for the purpose of more reduced power & area than the existing type of designs as well as the new design which is combined of virtual grounding with read Error Reduction Logic is compared with the existing technologies & the nanometer technology is also improved for the purpose of much improved reduction of area & power factors than the Schmitt Trigger based SRAM Designs the simulations were done using microwind& DSCH results.
Authors and Affiliations
P. Pradeep Kumar, K. Viswanath, N. Praveen Kumar, P. Sai Kumar
Keywords
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