A Review on High Performance Low Power Conditional Discharge Flip Flop
Journal Title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) - Year 2016, Vol 4, Issue 5
Abstract
Different logic circuits have emerged as a major area of research due to its ability to reduce the power dissipation. This is the main requirement in the low power digital circuit design. It has wide applications like low power CMOS design, Nanotechnology, Digital signal processing. In this paper, the designing and analysis of the Conditional Discharging Flip flop circuit is presented. The simulation is done at 1V using TSMC 90nm technology.
Authors and Affiliations
Sonam Parihar, Rachana Arya
Keywords
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