A review on power reducing methods of neural recording amplifiers
Journal Title: روش های هوشمند در صنعت برق - Year 2016, Vol 7, Issue 27
Abstract
Implantable multi-channel neural recording Microsystems comprise a large number of neural amplifiers, that can affect the overall power consumption and chip area of the analog part of the system.power, noise, size and dc offset are the main challenge faced by designers. Ideally the output of the opamp should be at zero volts when the inputs are grounded.In reality the input terminals are at slightly different dc potentials.The input offset voltage is defined as the voltage that must be applied between the two input terminals of the opamp to obtain zero volts at the output. Amplifier must have capability to reject this dc offset. First method that uses a capacitor feedback network with ac coupling of input devices to reject the offset is very popular in designs.very small low-cutoff frequency.The second method employs a closed-loop resistive feedback and electrode capacitance to form a highpass filter.Moreover,The third method adopts the symmetric floating resistor the feedback path of low noise amplifier to achieve low-frequency cutoff and rejects DC offset voltage. .In some application we can use folded cascade topology.The telescopic topology is a good candidate in terms of providing large gain and phase margin while dissipating small power. the cortical VLSI neuron model reducing power consumption of circuits.Power distribution is the best way to reduce power, noise and silicon area. The total power consumption of the amplifier array is reduced by applying the partial OTA sharing technique. The silicon area is reduced as a benefit of sharing the bulky capacitor.
Authors and Affiliations
samira mehdipour, mehdi habibi
Keywords
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