A Review on Thermal Aware Optimization of Three Dimensional Integrated Circuits (3D ICs)

Journal Title: International Journal of Modern Engineering Research (IJMER) - Year 2014, Vol 4, Issue 12

Abstract

As the technology size has reached upto 14nm, further shrinking creates some major performance issues. Three dimensional integrated circuits (3D ICs) are gaining importance in the present arena on account of their advanced features. While stacking of die on die in 3D ICs also result in serious thermal problems. These thermal issues can be minimised at different physical design stages with the help of various techniques and algorithms. In this paper an overview of the various methods used for thermal optimization is presented including techniques at floorplanning, placement and routing. It also includes the techniques involving the use of TSVs (through-silicon-vias).

Authors and Affiliations

Sakshi Raghuvanshi , Prince Nagar , G. K. Singh

Keywords

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  • EP ID EP121850
  • DOI -
  • Views 69
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How To Cite

Sakshi Raghuvanshi, Prince Nagar, G. K. Singh (2014). A Review on Thermal Aware Optimization of Three Dimensional Integrated Circuits (3D ICs). International Journal of Modern Engineering Research (IJMER), 4(12), 31-41. https://europub.co.uk/articles/-A-121850