A Study on Multi Material Gate All Around SOI MOSFET
Journal Title: The International Journal of Technological Exploration and Learning - Year 2014, Vol 3, Issue 3
Abstract
As the continuous down scaling of MOSFET device is required to increase the speed and packaging density of it, but it reduces the device characteristics in terms of short channel effect and reverse leakage current. At present, the single gate MOSFET reaching its scaling limit. These limitations associated with scaling give birth to number of innovative techniques which includes the use of different device structures, different channel materials and different gate oxide materials. In this paper different short channel effects suggested by different authors are covered along with their method of minimization. A structure based on the Fully depleted SOI Gate all around MOSFET has been suggested to overcome the scaling limit.
Authors and Affiliations
Neeraj Gupta| Lecturer, Amity School of Engineering & Technology, Amity University, Haryana, India, A. K. Raghav| Director, IRD, Amity University, Haryana, India, Alok K. Kushwaha| Professor., Birla Institute of Technology & Science, Dubai, UAE
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