A Survey of System Level Power Management Schemes in the Dark-Silicon Era for Many-Core Architectures
Journal Title: EAI Endorsed Transactions on Industrial Networks and Intelligent Systems - Year 2018, Vol 5, Issue 15
Abstract
Power consumption in Complementary Metal Oxide Semiconductor (CMOS) technology has escalated to a point that only a fractional part of many-core chips can be powered-on at a time. Fortunately, this fraction can be increased at the expense of performance through the dark-silicon solution. However, with many-core integration set to be heading towards its thousands, power consumption and temperature increases per time, meaning the number of active nodes must be reduced drastically. Therefore, optimized techniques are demanded for continuous advancement in technology. Existing efforts try to overcome this challenge by activating nodes from different parts of the chip at the expense of communication latency. Other efforts on the other hand employ run-time power management techniques to manage the power performance of the cores trading-off performance for power. We found out that, for a significant amount of power to saved and high temperature to be avoided, focus should be on reducing the power consumption of all the on-chip components. Especially, the memory hierarchy and the interconnect. Power consumption can be minimized by, reducing the size of high leakage power dissipating elements, turning-off idle resources and integrating power saving materials.
Authors and Affiliations
Emmannuel Ofori-Attah, Xiaohang Wang, Michael Opoku Agyeman
Keywords
Related Articles
- EP ID EP46086
- DOI http://dx.doi.org/10.4108/eai.19-9-2018.155569
- Views 339
- Downloads 0
Stochastic-Based Power Consumption Analysis for Data Transmission in Wireless Sensor Networks
Wireless sensor networks (WSNs) provide a lot of emerging applications. They suffer from some limitations such as energy constraints and cooperative demands essential to perform sensing or data routing. The networks coul...
Ant Colony Optimization Based Model Checking Extended by Smell-like Pheromone
Model Checking is a technique for automatically checking the model representing software or hardware about whether they satisfy the corresponding specifications. Traditionally, the model checking uses deterministic algor...
GRAPP&S, a Peer-to-Peer Middleware for Interlinking and Sharing Educational Resources
This article presents GRAPP&S (Grid APPlication & Services), a specification of an E-learning architecture for the decentralized sharing of educational resources. By dealing with different resources such as files, data s...
Implementing Energy Saving Techniques for Sensor Nodes in IoT Applications
The technique is designed to optimize the energy consumption for sensor processing layer in Internet Of Things (IoT). Sleep time calculation algorithm is built on the gateway to predict the sleep time of sensor nodes acc...
Towards Data-Driven On-Demand Transport
On-demand transport has been disrupted by Uber and other providers, which are challenging the traditional approach adopted by taxi services. Instead of using fixed passenger pricing and driver payments, there is now the...