An innovative scheme for representation of signed numbers employing ternary logic and method of development of semiconductor optical amplifiers based wavelength encoded optical ternary half adder

Journal Title: IOSR Journals (IOSR Journal of Computer Engineering) - Year 2015, Vol 17, Issue 5

Abstract

Abstract: In binary logic, two different logical states are used to represent signed as well as unsigned numbers. In case of signed numbers one bit, usually the Most Significant Bit is solely devoted to represent the sign and thereby losing large amount of information storage capacity of a channel. In this communication, the authors use ternary logic comprising of 1, 0 and 1 to represent the number without any dedicated sign bit, so that the information storage capacity will increase to a large extent. Again it is also established that tri-state or ternary logic operations have the basic advantages of higher capacity and superior quality over its binary counterpart. In optics, multiple-valued logic can very easily be accommodated utilizing intensity, polarization, phase and also the wavelength of the wave as well. The wavelength dependent encoding/decoding techniques have established its superiority over the other optical data encoding techniques. In this communication the authors also propose a new scheme of implementing a wavelength encoded half adder with tri-state logic in the all optical domain using the wavelength conversion by the nonlinear polarization rotation in semiconductor optical amplifiers. Also the optical add/drop multiplexer employing the special filtering property of the SOA is utilized for the designing of the tri-state logic based half adder circuits.

Authors and Affiliations

Parimal Ghosh , Pathik Kumbhakar

Keywords

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  • EP ID EP132829
  • DOI -
  • Views 96
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How To Cite

Parimal Ghosh, Pathik Kumbhakar (2015). An innovative scheme for representation of signed numbers employing ternary logic and method of development of semiconductor optical amplifiers based wavelength encoded optical ternary half adder. IOSR Journals (IOSR Journal of Computer Engineering), 17(5), 19-27. https://europub.co.uk/articles/-A-132829