Analysis, Simulation and Comparison of Different Multiplier Algorithms
Journal Title: International Journal of Engineering, Science and Mathematics - Year 2011, Vol 1, Issue 3
Abstract
High performance systems such as microprocessors, digital signal processors, filters, ALU etc. which is need of hour now days requires a lot of components. One of main component of these high performance systems is multiplier. Most of the DSP computations involve the use of multiply-accumulate operations, and therefore the design of fast and efficient multipliers is imperative. However, area and speed are usually conflicting constraints so that improving speed results mostly in larger areas. This paper investigates analysis of different multiplier for speed, area and memory usage. we try to present an efficient multiplier is produce fast, accurate and require minimum area. In this paper we will first study three different types of multipliers: array multiplier, radix-2 and radix-4 modified booth multiplier algorithm. Then we compared the working of different multipliers by comparing the memory usage, speed and area by each of them. The result of this paper helps us to choose a better option to choose a better multiplier out of three multipliers in fabricating different systems.
Authors and Affiliations
Smiksha, Vikas Sindhu and Rajender Kumar
Keywords
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