Application of CNTFET as Logic Gates and its implementation using HSPICE

Journal Title: International Journal of Modern Engineering Research (IJMER) - Year 2013, Vol 3, Issue 6

Abstract

The steady reduction in the dimension of transistors, according to Moore's law has been the main force behind the regular leaps in the level of performance of the silicon ICs. Due to the effects like the short channel effects, tunnelling effect, additional heat dissipation, interconnect problems etc problems arise. So it is not possible to reduce the size further.Hence now it is necessary to adopt new material or technology. Carbon Nano Tube Field Effect Transistors (CNTFETs) are being widely studied as possible successors to silicon MOSFETs. This paper focuses on simulation of CNTFET based digital circuits using HSPICE and parameters like delay, power and PDP are calculated

Authors and Affiliations

Sameer Prabhu

Keywords

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  • EP ID EP110040
  • DOI -
  • Views 109
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How To Cite

Sameer Prabhu (2013). Application of CNTFET as Logic Gates and its implementation using HSPICE. International Journal of Modern Engineering Research (IJMER), 3(6), 3646-3648. https://europub.co.uk/articles/-A-110040