Complexity Reduction Area Efficient BCH Code for NAND Flash Memory

Abstract

There is a tremendous demand for digital transmission and storage systems due to the increase in development of communication in which data is transferred from transmitter side to receiver side at a faster rate with less time. Even though the time consumption is reduced, there is a chance of occurring errors due to multipath propagation. In order to control these errors Error Correcting Codes (ECC) was invoked, which includes variety of codes depending on application. One of the simplest and first block code is Hamming codes which are capable of correcting only one random error and they are not practically useful. So in this paper, Bose, Chaudhuri and Hocquenghem (BCH) codes form a large class of powerful random error-correcting cyclic codes which can correct multiple errors.Inaddition with BCH, the NAND Flash memory is used to store codeword, and makes for correction part in decoder side where the error is corrected effectively. The enhanced (15, 5, 3) BCH code using hardware description language called VHDL and synthesized in Xilinx 13.2 version.

Authors and Affiliations

Ms. C. Gayathri, P. Mozhiarasi

Keywords

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  • EP ID EP20214
  • DOI -
  • Views 278
  • Downloads 4

How To Cite

Ms. C. Gayathri, P. Mozhiarasi (2015). Complexity Reduction Area Efficient BCH Code for NAND Flash Memory. International Journal for Research in Applied Science and Engineering Technology (IJRASET), 3(4), -. https://europub.co.uk/articles/-A-20214