Design and Analysis of RNS Based FIR Filter Using Verilog Language

Abstract

Digital filter plays an important role in Very Large Scale Integration (VLSI) technology. The existing Finite Impulse Response (FIR) filter has long transient response which is the major limitation. To overcome this drawback, Residue Number System (RNS) based FIR filters is developed which is described in this paper. High-speed is obtained by introducing the residue arithmetic concept that permits the computation of the filter output by using N FIR sub filters of reduced dynamic range operating in parallel form. Three moduli sets are used in RNS based Filter. 4-tap Low Pass Filter (LPF) type of FIR filter and RNS based FIR filter with 4-tap LPF are designed using Verilog language and analyzed in this paper. The simulation is done by using Xilinx tool Integrated Software Environment (ISE)-13.1

Authors and Affiliations

P. Samundiswary, S. Kalpana

Keywords

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  • EP ID EP141412
  • DOI -
  • Views 170
  • Downloads 0

How To Cite

P. Samundiswary, S. Kalpana (2013). Design and Analysis of RNS Based FIR Filter Using Verilog Language. International Journal of Computational Engineering and Management IJCEM, 16(6), 61-66. https://europub.co.uk/articles/-A-141412