Design and Implementation of ASIC Based Dual Data Rate SDRAM Memory Controller
Journal Title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) - Year 2015, Vol 3, Issue 6
Abstract
A Dedicated Memory Controller is of prime importance in applications that do not contain microprocessors (high-end applications). The Memory Controller provides command signals for memory refresh, read and write operation and initialization of SDRAM. Our work will focus on ASIC Design methodology of Double Data Rate (DDR) SDRAM Controller that is located between the DDR SDRAM and Bus Master. The Controller simplifies the SDRAM command interface to standard system read/write interface and also optimizes the access time of read/write cycle. Double Data Rate (DDR) SDRAM Controller is implemented using Xilinx 14.3.
Authors and Affiliations
V. Suresh, Y. Murali
Keywords
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