Design And Implementation of Cascaded Multilevel Inverter Topology With Reduced Number Of Components
Journal Title: International Journal of Science Engineering and Advance Technology - Year 2017, Vol 5, Issue 1
Abstract
In this paper, using H-bridge topology a general cascade multilevel inverter for the implementation of 49th level inverter and a new algorithm in generating all voltage levels for a 49th level with less number of dc sources. Results in decreased complexity and economical. The comparison is done with the conventional topologies and confirmed by simulation results.
Authors and Affiliations
Doonaboyina Sandhya Rani| M.Tech Student, Department of EEE, KIET, kakinada, India, P Koteswara Rao| Asst. Professor, Department of EEE, KIET, Kakinada, India
Keywords
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- EP ID EP16876
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