Design and Implementation of Efficient Modulo 2n+1 Adder
Journal Title: International Journal of Computational Engineering and Management IJCEM - Year 2014, Vol 17, Issue 6
Abstract
In this brief, we proposed an efficient weighted modulo (2n +1) adders. This is achieved by modifying existing diminished-1 modulo (2n +1) adders to incorporate simple correction schemes. Our proposed adders can produce modulo sums within the range {0, 2n}, which is more than the range {0, 2n − 1} produced by existing diminished-1 modulo (2n +1) adders. And our proposed adder gives better performance in terms of area and power when compared with previously existing architectures. We have implemented the proposed adders using 0.18-µm technology, and also compared the performance parameters of those adders.
Authors and Affiliations
V. Jagadheesh, Y. Swetha
Keywords
Related Articles
- EP ID EP121738
- DOI -
- Views 122
- Downloads 0
Cloud Computing Testing Evaluation
Testing becomes an important process in software development not only in terms of exposure but also in terms of performance, usability, safety, security, reusability. Also software testing is an essential activity to sof...
Exploring the Determinants of India’s Intra-Industry Trade: A Panel VAR/VECM Approach
Intra-Industry Trade (IIT) is a simultaneous import and export of similar goods and services by a country. This type of trade pattern has become an integral part of not only India’s trade but also for World. Since compar...
Design and Analysis of CMOS Based DADDA Multiplier
Multiplier is an important circuit used in electronic industry especially in digital signal processing operations such as filtering, convolution and analysis of frequency. There are different types of algorithms used in...
Reconstruction of Perturbed Data using K-Means
A key element in preserving privacy and confidentiality of sensitive data is the ability to evaluate the extent of all potential disclosure for such data. In other words, we need to be able to answer to what extent confi...
High Speed and Reduced Power – Radix-2 Booth Multiplier
A multiplier is one of the key hardware blocks in most digital and high performance systems such as FIR filters, digital signal processors and microprocessors etc. A system’s performance is generally determined by the pe...