Design And Verification of AMBA APB Protocol
Journal Title: International Journal of engineering Research and Applications - Year 2017, Vol 7, Issue 1
Abstract
Advanced microcontroller bus architecture (AMBA) is a well established open specification for the proper management of functional blocks comprising system-on-chips (SOCs). A Memory Controller is designed to cater to this problem. This design presents an intellectual property (IP) for inter-Advanced peripheral bus (APB) protocol. The Memory Controller is a digital circuit which manages the flow of data going to and from the main memory. It can be a separate chip or can be integrated into the system chipset. This paper revolves around building an Advanced Microcontroller Bus Architecture (AMBA) compliant Memory Controller as an Advanced High-performance Bus (AHB) slave. The work involved is of APB Protocol and its slave Verification. The whole design is captured using VHDL, simulated with ModelSim and configured to a FPGA target device belonging to the Virtex4 family using Xilinx.
Authors and Affiliations
Kommirisetti Bheema Raju, Bala Krishna Konda M. Tech
Keywords
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- EP ID EP389679
- DOI 10.9790/9622-0701018790.
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