Design and Verification of Five Port Router Network
Journal Title: IOSR Journal of Electronics and Communication Engineering(IOSR-JECE) - Year 2018, Vol 13, Issue 2
Abstract
A Network-on-chip (NoC) is a new technique in complex system-on-chip (SoC) designs which helps to facilitate efficient on chip communication among networks. It permits decoupling of communication, computation and also permits scalable communication. Information is transmitted in the form of packets through networks. Routers help to route the data. So efficiency of router required to be more with higher throughput and lower latency. The proposed methodology incudes design, analyze and implementation of router architecture for NoC communication. Routers consists of five ports in which four are connected in different directions to other ports and processing element is connected to fifth with the help of network interface. The first architecture consists of basic router together with scheduler and demultiplexer. The second architecture includes arbiter and crossbar switch. The third architecture is developed with help of CDMA technology which is popular in wireless communication. By comparing three architectures the performance in terms of latency, throughput and delay, performance of CDMA router is much efficient then rest of two.
Authors and Affiliations
Avinash G, Megha N
Keywords
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- EP ID EP439082
- DOI 10.9790/2834-1302028996.
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