Design & Implementation Of On Chip Permutation Network for MPSOC on FPGA
Journal Title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) - Year 2015, Vol 3, Issue 4
Abstract
This paper presents the silicon-proven design of a novel on-chip network to support guaranteed traffic permutation in multiprocessor system-on-chip applications. The proposed network employs a pipelined circuit-switching approach combined with a dynamic path-setup scheme under a multistage network topology. The dynamic path-setup scheme enables runtime path arrangement for arbitrary traffic permutations. The circuit-switching approach offers a guarantee of permuted data and its compact overhead enables the benefit of stacking multiple networks. .Design and development is done by XILINX 12.2 using Verilog and simulated on Modelsim 6.3f and implemented on Spartan 3 FPGA Device
Authors and Affiliations
Chandrashekar. P, Manjunath Badiger
Keywords
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