Design Validation of Inter-IC (I²C) Bus and Implementation in Real-Time PCI Application
Journal Title: International Journal of Engineering and Science Invention - Year 2017, Vol 6, Issue 8
Abstract
Validation is the activity that determines the correctness of the design that is being created. It ensures that the design does meet the specifications required and operates properly. This paper will focus on developing an exhaustive, reusable and configurable environment to validate the Inter-IC (I²C) interface on one of Intel’s silicon products. Inter-IC (I²C) provides a way of serial communication between CPU and low speed peripherals with in short range. In this paper used a specimen based validation environment for validation of Inter-IC (I²C) protocol. Specimen provides inbuilt constraint solver, which allows fast and easy test generation. This paper will also focus on developing the validation environment to validate the System Management Bus (SMBus) and PCA9555 IO expander, which are usage models of Inter-IC (I²C) bus. System Management Bus (SMBus) provides a control bus for system. PCA9555 IO expander provides 16 bits of General Purpose parallel Input/output (GPIO) expansion for Inter-IC (I²C) bus applications. Hot plug operation allows addition or removal of components that would expand or shrink the system without significant interruption to the operation of the system. Implementing Peripheral Component Interconnect (PCI) Hot plug functionality with System Management Bus (SMBus) and PCA9555 IO expander reduces the required number of IO pins. Such Peripheral Component Interconnect (PCI) Hotplug validation environment can be developed by re-using System Management Bus (SMBus) and PCA9555 validation environments to validate Peripheral Component Interconnect (PCI) Hotplug operation on Intel Peripheral Component Interconnect (PCI) Express Controller.
Authors and Affiliations
M. Srinu, B. Krishna
Keywords
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