DMATM: Dual Modified Adaptive Technique Based Multiplier
Journal Title: International Journal of Mechanical and Production Engineering Research and Development (IJMPERD ) - Year 2017, Vol 7, Issue 5
Abstract
The most critical arithmetic functional units are digital multipliers. This system overall performance is depends on the throughput, of the multiplier. An n-bit by n-bit multiplier can be employed by an n-bit by n-bit multiplication, which can be carried out iteratively. K cycles are required for completion of a multiplication, which can be terminated earlier, if some of the leading significant bytes are all zeros or ones. This paper proposes a simple scheme of dual modified adaptive, to exchange the two operands dynamically, for reducing more cycles to 32-bit by 32-bit multiplications. The designing of a dual modified adaptive multiplier for 32*32 bit number multiplication is proposed. Now-a-days, computer systems are very high speed unique multiplier. Hence, a Dual Modified adaptive multiplier is proposed. M, N, interconnected blocks are generated by this proposed system. The Dual Modified adaptive multiplier is obtained, by enlarging bit of operands and producing an additional product. Multiplication operation which is performed by Dual Modified adaptive is efficient with less area and it reduces the delay.
Authors and Affiliations
R. Gangadhar Reddy, Uzma Fathima, P. B. Natarajan, M. Ramesh Babu
Keywords
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