Fault Tolerant Linear State Machine Design Approach for Safety Critical Systems Implemented on FPGA

Journal Title: International Journal of Science and Research (IJSR) - Year 2015, Vol 4, Issue 2

Abstract

: In this paper, a new method for the design of fault tolerant linear state machines with initial state 0 and one dimensional input and one-dimensional output is proposed. It is shown that the LFSR-implementation of the transfer function of a linear automaton can be utilized to correct transient errors in the memory elements. Since the state vector of a linear automaton is uniquely determined by the last n inputs and outputs, a transient error in a memory element can be corrected within n clock cycles by use of the corrected output symbols, where n is the number of components of the state vector

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  • EP ID EP356549
  • DOI -
  • Views 41
  • Downloads 0

How To Cite

(2015). Fault Tolerant Linear State Machine Design Approach for Safety Critical Systems Implemented on FPGA. International Journal of Science and Research (IJSR), 4(2), -. https://europub.co.uk/articles/-A-356549