High Speed Design of an Information Lossless 8 Bit Carry Select Adder using CNT FET

Abstract

Basic reasons for research on reversible logic are the power consumption and heat dissipation. Existing systems have designed carry select added using TSG gate, for four bit addition. In the proposed system an enhancement of eight bit carry selection is performed with Fault tolerant Full Adder. Cnt fet is used in the implementation of the proposed eight bit carry select adder, which proves the reduction in power is more than 50% than that of existing system.

Authors and Affiliations

S. Manisha Sree Adithtya, S. P. Saraswathi, S. Niranjana

Keywords

Related Articles

Multichannel Contact Center Performance Analysis

The Contact Centers play important role in customer interactions. They provide information to differentiate company products and services and build loyalty relations with customers. The Contact Center is the central...

Detection & Prevention of Unauthorized User through Policy Server for a Network

Now a day’s Accessing the information all over the world is very fast & quick. Accessing the information is done over the internet. Industry & various organizations are facing access management problems that require n...

Multiple View Point on Cluster Analysis

The clustering methods have to assume some cluster relationship among the data objects that they are applies on. Similarity between a pair of objects can be defines either explicitly or implicitly. In this paper we i...

An Effective Scheme for Countering Distributed Denial of Service Attacks on Mobile Ad-hoc Networks

Mobile ad hoc networks play a key role in the private and public communication, yet their application is being hampered by network attacks. One of the most dangerous attacks that pose a serious threat to the mobile a...

A Game Theory To Load Balancing Strategy To Improve The Efficiency In Public Cloud Environment

Good load balancing makes cloud computing more proficient and increases user satisfaction. At present cloud computing is one of the utmost platforms which deliver storage of data in very lowers cost and accessible fo...

Download PDF file
  • EP ID EP27551
  • DOI -
  • Views 372
  • Downloads 6

How To Cite

S. Manisha Sree Adithtya, S. P. Saraswathi, S. Niranjana (2013). High Speed Design of an Information Lossless 8 Bit Carry Select Adder using CNT FET. International Journal of Research in Computer and Communication Technology, 2(3), -. https://europub.co.uk/articles/-A-27551