Implementation of Fast Pipelined AES Algorithm on Xilinx FPGA

Journal Title: International Journal of Science and Research (IJSR) - Year 2013, Vol 2, Issue 8

Abstract

The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data also called Rijndael. The algorithm described by AES is a symmetric-key algorithm, meaning the same key is used for both encrypting and decrypting the data. Hardware-based cryptography is used for authentication of users and of software updates and installations. Software implementations can generally not be used for this, as the cryptographic keys are stored in the PC memory during execution, and are vulnerable to malicious codes. Hardware-based encryption products can also vary in the level of protection they provide against brute force rewind attacks, Offline parallel attacks, or other cryptanalysis attacks. The algorithm was implemented in FPGA due to its flexibility and reconfiguration capability. A reconfigurable device is very convenient for a cryptography algorithm since it allows cheap and quick alterations. The implementation of pipelined cryptography hardware was used to improve performance in order to achieve higher throughput and greater parallelism. The AES hardware was implemented in three modules contains of the encryption, the decryption and the key expansion module.

Authors and Affiliations

Keywords

Related Articles

Non-Surgical Treatment of Lip Venous Lake using a 980nm Diode Laser: Report of a Series of 10 Cases

Introduction: Venous lake (VL) is characterized by vascular proliferation, clinically evidenced as а soft tumor with red-bluish color. If traumatized VL are prone to hemorrhage and their treatment usually requires cautio...

Study on the Effect of Elevated Temperature with Intermittent Cooling on the Properties of Concrete

The production of portland cement is not only costly and energy-intensive, but it also produces large amounts of carbon dioxide. With large quantities of fly ash available around the world at low costs, the use of flyash...

Architecture for Analysis of Multi-Dimensional Data using Standalone Desktop based Cluster

The critical parameters of multi-dimensional data analysis are its data size and the number of computations. The data size is typically large and the numbers of computations are immense. The complexity increases further...

Antimicrobial Efficiency of NaOCL and Helbo Laser against Enterococcus faecalis

Abstract: The aim was to compare the efficacy of antimicrobial therapy, applying photodynamic therapy in different time intervals and the conventional method of irrigation of channel with sodium hypochlorite NaOCl 2.5 %....

Download PDF file
  • EP ID EP337517
  • DOI -
  • Views 51
  • Downloads 0

How To Cite

(2013). Implementation of Fast Pipelined AES Algorithm on Xilinx FPGA. International Journal of Science and Research (IJSR), 2(8), -. https://europub.co.uk/articles/-A-337517