Low Area and Low Power CMOS technology based RAM and Ternary CAM memory design
Journal Title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) - Year 2015, Vol 3, Issue 12
Abstract
Ternary content addressable memory (TCAM) is an associative memory or associative array for very high speed searching applications. It compares input search data (tag) against a table of stored data and returns the address of matching data. Several custom computers were built to implement TCAM. In this paper the system proposed an XOR based content addressable memory. Data matching process is applicable to match line sense amplifier (MLSA). Given an input tag the proposed architecture computes a few possibilities for the location of the matched tag and performs the comparisons on them to locate a single valid match. Proposed method is to design the CMOS based RAM and CAM memory architecture design. This design is used to find match line data effectively and to reduce the leakage power level for match line process. The proposed system is mainly focused by the matched line sense amplifier process and to compare the content data between the data register and 4x4 TCAM cell design. Ternary CAM design is used to consume less power and also to reduce the leakage power of CMOS transistors. This design is used to reduce the delay time as well as to increase the speed in ML search process.
Authors and Affiliations
V. Raghavendran, B. Pushparaj
Keywords
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