LOW POWER MULTIPLEXER BASED FULL ADDER USING PASS TRANSISTOR LOGIC
Journal Title: International Journal of Advanced Research in Computer Engineering & Technology(IJARCET) - Year 2012, Vol 1, Issue 5
Abstract
The efficiency of a system mainly depends on the performance of the internal components present in the system. So, the internal components must be designed in such a way that they should consume less power with increase in speed. Full adder is one of the major components in the design of many sophisticated hardware circuits. Perhaps it is one of the essential components in the design of a wide variety of processors also. In this paper several multiplexer based pass transistor full adder topologies are presented. The main idea is to introduce the design of high performance and low power mutiplexer based pass transistor full adders which acquires less area and transistor count. . The high performance multiplexer based pass transistor low power full adder circuit is designed and the simulation has been carried out on Mentor Graphics tool. The result shows that the proposed full adder is an efficient full adder cell with least MOS transistor count that reduces the high power consumption and increases the speed.
Authors and Affiliations
Mr. B. Dilli kumar , , Mr. K. Charan kumar , M. Bharathi,
Keywords
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