Design of Operational Trans conductance Amplifier in 0.18μm Technology
Journal Title: International Journal of Modern Engineering Research (IJMER) - Year 2012, Vol 2, Issue 1
Abstract
This paper presents design concept of Operational Transconductance Amplifier (OTA). The 0.18μm CMOS process is used for Design and Simulation of this OTA. This OTA having a bias voltage 1.8 with supply voltage 1.8 V. The design and Simulation of this OTA is done using CADENCE Spectere environment with UMC 0.18μm technology file. The Simulation results of this OTA shows that the open loop gain of about 71 dB which having GBW of 37 KHz. This OTA is having CMRR of 90 dB and PSRR of 85 dB. This OTA having power dissipation of 10 mW and Slew Rate 2.344 V/µsec.
Authors and Affiliations
SHWETA KARNIK , AJAY KUMAR KUSHWAHA ,PRAMOD KUMAR JAIN , D. S. AJNAR
Keywords
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