High Performance Data Encryption based on AdvancedEncryption Standard using FPGA
Journal Title: IOSR Journals (IOSR Journal of Computer Engineering) - Year 2014, Vol 16, Issue 6
Abstract
Abstract: Many digital services, such as confidential video conferencing, medical, military imaging systemsand the rapid progress of Internet, require reliable security and encryption in real time to store and transmitthese digital images/videos.In this paper, a parallel implementation of the advanced encryption standard (AES)using pipelining technique is proposed. For more security, a pseudo random sequence generator (PRSG) isused in advance. The goal is to achieve a high-speed reliable security system for real time application. Theparallel architecture is implemented on Field Programmable Gate Arrays (FPGA) family of Spartan_6(XC6SLX16) using Very high speed Hardware Description Language (VHDL). An image encryption is taken asa case study. The system is capable to process image (256*256) in (0.00053) seconds; consequentially the real time requirement is achieved
Authors and Affiliations
M. Amr Mokhtar
Keywords
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