High speed customized serial protocol for IP integration on FPGA based SOC applications

Journal Title: International Journal of Modern Engineering Research (IJMER) - Year 2013, Vol 3, Issue 4

Abstract

 The serial communication is very commonly used communication protocol between various peripherals and processor. The current trend is all high speed buses are built with serial communication interface. As the key processing equipment of comprehensive task processing system, Mission management computer needs to crosslink with various equipments and the types of communication interface are different, a serial communication interface based on FPGA (Field Programmable Gate Array ) has been designed in this project used for data communication with other equipment . It guarantees the realization of the serial communication function under the condition of without any increasing in hardware  resources. The Xilinx Micro Blaze soft processor and PowerPC hard processor are widely used in FPGA based CSOC (configurable system on chip) applications. These processers do not have programmable serial links for interfacing with embedded peripherals which are mostly off chip. In this project it is proposed to implement dynamically configurable serial communication block in VHDL. The developed module shall be interfaced with Micro Blaze processor as a general purpose IO port. The serial interface blocks shall be implemented to handle high data rate serial links and provide parallel interface to the processor. The serial interface transceiver shall consist of PISO, SIPO shift registers, clock switching modules, counters and control logic.The Xilinx Embedded development kit (EDK) shall be used for developing the test application in C programming language. The serial interface blocks which are coded in VHDL shall be synthesized using Xilinx ISE. The Modelsim simulation software shall be used for simulation. The Spartan 3 family FPGA board shall be used for verifying the results on board.

Authors and Affiliations

R. Renukanath

Keywords

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  • EP ID EP104310
  • DOI -
  • Views 105
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How To Cite

R. Renukanath (2013).  High speed customized serial protocol for IP integration on FPGA based SOC applications. International Journal of Modern Engineering Research (IJMER), 3(4), 2396-2402. https://europub.co.uk/articles/-A-104310