IMPLEMENTATION OF POWER EFFICIENT PROGRAMMABLE PRPG USINGBS-LFSR BASED ON BIST
Journal Title: International Journal of Engineering Sciences & Research Technology - Year 30, Vol 5, Issue 10
Abstract
This paper describes a low-power programmable generator with bit swapping technique which is capable ofproducing pseudorandom test patterns with toggle selection(TOSE) , enhanced fault coverage and poweroptimization compared to present BIST with normal LFSR based Pseudorandom pattern generator. It consists ofa BS-LFSR driving a phase shifter with features like producing binary sequences with TOSE activity. A methodis introduced to automatically select different controls of the generator for easy and precise tuning. Same techniqueis used to deterministically guide the generator towards test sequences with improved fault coverage to patterncount ratio. This paper proposes a LP test compression method that allows the power envelope to be predictable,flexible and accurate using TOSE based LBIST. The proposed hybrid scheme efficiently combines testcompression with LBIST, where both techniques work to deliver high quality test.
Authors and Affiliations
S . Sajida
Keywords
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- EP ID EP96421
- DOI 10.5281/zenodo.163302
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