Utilization of DVTS for Power Dissipation in Submicron Fabrication
Journal Title: International Journal of Engineering Sciences & Research Technology - Year 30, Vol 2, Issue 12
Abstract
Power dissipation is one of the critical design factors in microelectronics industry which opens lot of space for advance development in deep sub micron fabrication techniques for the devices. Low power design reduces cooling cost and increases reliability, especially for high density systems. Moreover, it reduces the weight and size of portable devices. In order to achieve the aim, static and dynamic component plays the main role in power dissipation of CMOS circuits. With the advent of new generations, power consumption of modern digital integrated circuits becomes a serious issue which is increasing continuously. To overcome this problem, a new idea has been proposed which reduces the consumption of power directly by controlling the supply voltage and body biasing, dynamically, and this can be done by DVTS scheme. Hence, Dynamic Voltage and Threshold scaling scheme preserves the leakage power during the active mode of the circuit.
Authors and Affiliations
Shivani*
Keywords
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