Novel Approach to Crosstalk Avoidance in RLC Modelled Interconnects Using Bus Encoder
Journal Title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) - Year 2014, Vol 2, Issue 8
Abstract
In this paper, we have proposed efficient bus encoder for crosstalk avoidance in RLC modelled interconnects. In past years many encoding methods have been proposed which dealt with only RC modelled VLSI inter-connects.Due to fast clock speeds, longer length of on-chip interconnects and smaller signal rise times, the on-chip inductive effects have increased for the deep submicron technologies (DSM). All these factors raises the overall concern for crosstalk, propagation delay and power dissipation. Therefore, this research paper introduces an efficient Bus Encoder by the help of Bus Inverting (BI) technique. Proposed design reduces both crosstalk delay and area in the RLC modelled interconnects which makes the circuit design suitable for current high-speed low power VLSI interconnects. The proposed work shows an overall reduction of crosstalk delay by 17.54% and area efficiency by 28.57%.
Authors and Affiliations
Sheetal Meena, Ghanshyam Jangid
Keywords
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- EP ID EP18571
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