Power Analysis of Concurrent Error Detection in Orthogonal Latin Squares Codec
Journal Title: International Journal of Research in Computer and Communication Technology - Year 2014, Vol 3, Issue 11
Abstract
One of the major drawbacks of the data transmission is existence of errors. These errors exist in the circuits for transmission, reception and data storage. Error correction codes (ECCs) are commonly used toprotect memories from errors. As multibit errors become more frequent,single error correction codes are not enough and more advanced ECCsare needed. Orthogonal Latinsquares (OLS) codes are one-step majority logic decodable (OS-MLD) and have been recently considered toprotect caches and memories. OLS codes are better than the other codes used as they provide wide range for block sizes and error correction capabilities. The proposed method reduces the overhead of the parity bits by extending the data block size to be protected.The proposed codes are implemented in Spartan 6 xc6slx453csg324 and power analysis have been performed.
Authors and Affiliations
M Lalita_Kiranmani, G S S Prasad
Keywords
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