Reconfigurable Fir Filter for Software Defined Ratio Based On VHBCSE Algorithm
Journal Title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) - Year 2016, Vol 4, Issue 6
Abstract
To reduces the number of multiplications per input sample(MPIS) and additions per input sample(APIS) an optimization technique consist of two-step is used in the design of reconfigurable interpolation filter for multi standard digital up converter(DUC). . For the better efficiency of the constant multiplier a vertical-horizontal binary common subexpression elimination (VHBCSE) algoritm is used (FIR filter whose coefficient dynamically changes).This reducing the area and as well as power.
Authors and Affiliations
Yuvaraju. M, Naraina. A, Sethulaksmi V. S
Keywords
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