Recursive Pseudo-Exhaustive Two-Pattern Generator  

Abstract

Pseudo-exhaustive pattern generators for built-in self-test (BIST) provide high fault coverage of detectable combinational faults with much fewer test vectors than exhaustive generation. In (n, k)-adjacent bit pseudo-exhaustive test sets, all 2k binary combinations appear to all adjacent k-bit groups of inputs. With recursive pseudoexhaustive generation, all (n, k)-adjacent bit pseudoexhaustive tests are generated for k, n and more than one modules can be pseudo-exhaustively tested in parallel. In order to detect sequential (e.g., stuck-open) faults that occur into current CMOS circuits, two-pattern tests are exercised. Also, delay testing, commonly used to assure correct circuit operation at clock speed requires two-pattern tests. In this paper a pseudoexhaustive two-pattern generator is presented, that recursively generates all two-pattern (n, k)- adjacent bit pseudoexhaustive tests for all k, n. To the best of our knowledge, this is the first time in the open literature that the subject of recursive pseudoexhaustive two-pattern testing is being dealt with. A software-based implementation with no hardware overhead is also presented.  

Authors and Affiliations

PRIYANSHU PANDEY , VINOD KAPSE

Keywords

Related Articles

Android Application to get Word Meaning through Voice 

The mobile phone users are increasing day by day and everyone wants to develop new things which are improved version of existing one. The user might want the faster technology which can give the word-meaning by giv...

DATA SHARING IN THE CLOUD USING DISTRIBUTED ACCOUNTABILITY

Now a day’s Cloud Computing is the rapid growing technology. Now most of the persons are using Cloud Computing technology .Cloud computing enables highly scalable services to be easily consumed over the Internet on an as...

Design & Implementation of 64 bit ALU for Instruction Set Architecture & Comparison between Speed/Power Consumption on FPGA  

In the present paper design of 64 bit ALU is presented. Arithmetic Logical Unit is the part of Microprocessor. All the arithmetic & logical functions are performed inside the ALU. So ALU is the heart of the micropr...

A New Way to Implement Stegnography by Minimizing Distortion  

In this paper we are going to learn about the minimization of distortion in steganography. For this purpose we use a general nonbinary embedding operation and discuss various system requirements. We assume every possible...

 DDS architecture for digital frequency generation

Direct digital synthesizers (DDS) are important components in many digital communication systems[4].DDSs are now available as integrated circuits and their output waveforms up to hundreds of megahertz. Direct digit...

Download PDF file
  • EP ID EP136141
  • DOI -
  • Views 90
  • Downloads 0

How To Cite

PRIYANSHU PANDEY, VINOD KAPSE (2012). Recursive Pseudo-Exhaustive Two-Pattern Generator  . International Journal of Advanced Research in Computer Engineering & Technology(IJARCET), 1(5), 380-385. https://europub.co.uk/articles/-A-136141