Retime Low Power Approximate Multiplier for Image Sharpening and Smoothing`
Journal Title: IOSR journal of VLSI and Signal Processing - Year 2018, Vol 8, Issue 2
Abstract
In DSP systems, due to demand in the higher computational performance in the architecture’s is increasing the complexity. In order to enhance the performance, the approximate arithmetic circuits are designed with small errors to increase the speed. The main aim of this work is to approximate the multiplication process with low power consumption. In this paper, a retime low power approximate multiplier is proposed. The approach is based on rounding the operands to the nearest exponent of two. Using this approach, the computational intensive part of multiplication is omitted and thus improving the speed of the multiplier at the cost of small penalty errors. This proposed approach is appropriate for both signed and unsigned operations. The efficiency of the proposed Retime approximate multiplier is analyzed by FIR filter using cross correlation method in image sharpening and smoothing.
Authors and Affiliations
Jalaja S1 ,, Tejaswini A2
Keywords
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