Side-Channel Passive Attacks Implementation to Cryptographic Hardware Using FPGA

Abstract

This paper dealt with an FPGA based test bed used for injecting faults through clock glitches, to result in setup and hold violations. The UART interface is realized on FPGA to provide PC based controlling for this fault injection. The pre-build serial International Data Encryption (IDEA) algorithm synthesis models (.ngc files) will be used as test encryption algorithm. A main objective of our research is to develop an efficient method for protecting FPGAbased implementations of cryptographic algorithms through effective concurrent testing of various types of faults, including faults injected by the attackers. An essential part of this research is to develop a method and tool for the evaluation of susceptibility of FPGA-based circuits to fault injection attacks. In this paper, we present such a method and tool. It allows us to examine an FPGA-based circuit, in particular an implementation of a cryptographic algorithm, subjected to a fault injection attack based on clock glitching. The effectiveness of the proposed approach is assessed for the IDEA implementation.

Authors and Affiliations

K. Durga Rajasekhar, O. Sudha Bharathi, K. Sirisha, R. Satish Kumar

Keywords

Related Articles

An Enhanced Technique for Transferring the Image Using Wavelet SVD Mosaic Images Under Color Retrieval Mode

Insurance about advanced media content need turned into a progressively paramount issue for content managers also administration suppliers. Likewise watermark distinguished about illustration, a major engineering org...

Text Detection On Scene Images Using MSER

Text detection and recognition is one of the difficult tasks in the computer vision community and there is a lot of research going on in recent years. This paper focuses on the problem of text detection and recogniti...

Verification of Metadata by Encryption for Data Storage Security in Cloud

Cloud Computing provides the way to share distributed resources and services that belong to different organizations or sites. Since Cloud Computing share distributed resources via network in the open environment thus...

Secure Group Communication by Establishing a Novel Trust Relationship Model and Detecting Malicious nodes in Peer to Peer Systems

Trust administration in P2P framework is utilized to distinguish vindictive practices and to advance legitimate and agreeable communications. The fundamental objective of the prior P2P frameworks is the capacity of c...

Autograph Protocol for Wireless Sensor Networks

A wealth of innovative opportunities exists for a mobile communications solution that can reliably communicate data without the need for fixed network infrastructure. A key element of any communications system is the...

Download PDF file
  • EP ID EP28078
  • DOI -
  • Views 239
  • Downloads 0

How To Cite

K. Durga Rajasekhar, O. Sudha Bharathi, K. Sirisha, R. Satish Kumar (2014). Side-Channel Passive Attacks Implementation to Cryptographic Hardware Using FPGA. International Journal of Research in Computer and Communication Technology, 3(11), -. https://europub.co.uk/articles/-A-28078