slugCompiler Optimization for SIMD type Vector Processor

Abstract

Performance of the processor can be enhanced by parallelization of instructions in terms of execution. Here we are applying compiler optimization techniques like loop unrolling, loop peeling for SIMD type Vector Processor. SIMD type vector processor is a high performance computational model which exploits the computational capabilities of both SIMD and vector architecture. SIMD type vector processor works on short vector instructions of vector length four and has four processing units which enables execution of four vector operands simultaneously [1]. To have the model which speeds up the computation in this paper we have created a CDFG (Control Data Flow graph) which gives the direct translation to the hardware. To create a CDFG we have used the tool SUIF2 and MACHSUIF which is a research project provided by Stanford University and Harvard university. To create a CDFG from the C source file first we have to do profiling on it to get the area of source file which have higher run time. We have unrolled the loops to get maximum ILP (Instruction level Parallelism) [7]. To limit the hardware we have unrolled only up to a maximum size of 4 [1]. Then a CFG (Control Flow Graph) is created for the source C file. Then the data flow analysis has been done on each basic block of the CFG by using the bvd class provided with MachSUIF. Then all the DFG (Data Flow graph) of every basic block are combined to get a full CDFG. In this paper We have designed the new hardware i.e. the SIMD type Vector processor based on HPL-PD VLIW architecture ISA which is supported by trimaran by default to accelerate the work.

Authors and Affiliations

Mohammad Suaib, Mohd. Akbar

Keywords

Related Articles

Computing while Charging: Building a Distributed Computing Infrastructure using Smartphones

Every night, a large range of idle smartphones square measure blocked into an influence supply for recharging the battery. Given the increasing computing capabilities of smartphones, these idle phones constitute a sizea...

Analysis of Trust Dynamics in Cyclic Mobile Ad Hoc Networks

Mobile Adhoc networks are gaining popularity in today’s dynamic environment. These are characterized by high mobility, infrastructure less, self-organizing, quick deployability and resource constrained networks. The net...

A review on Cloud Computing Security issues and Threat

Cloud computing is a combination of traditional technology of computing and various other technologies such as parallel computing, distributed computing etc. The major goal is to achieve a complete system having capabil...

A Review on Vampire Attacks in ad hoc Wireless Networks

A new class of resource consumption attacks is Vampire Attacks. Such attacks use different routing protocols to disable the ad hoc wireless networks by depleting the battery power of the node. Devices in ad hoc wireless...

An Analysis on VANET and WSN Routing Algorithm- A Review

Wireless Sensor network (WSN) and vehicular Ad Hoc Network (VANET) are the subcategories of MANET. Both WSN and VANET are most emerging and trending technology which recently attracted more researches. Though WSN and V...

Download PDF file
  • EP ID EP17807
  • DOI -
  • Views 381
  • Downloads 12

How To Cite

Mohammad Suaib, Mohd. Akbar (2014). slugCompiler Optimization for SIMD type Vector Processor. International Journal for Research in Applied Science and Engineering Technology (IJRASET), 2(3), -. https://europub.co.uk/articles/-A-17807