Solving Digital Circuit Layout Problem based on Graph Partitioning Technique: A Glance
Journal Title: International Journal of Advanced Research in Computer Engineering & Technology(IJARCET) - Year 2013, Vol 2, Issue 6
Abstract
—Digital Circuit Layout is a combinatorial optimization problem. Due to the complexity of integrated circuits, the first step in physical design is usually to divide a design into subdesigns. The work presents a brief survey of major contributions to solve digital circuit layout problem using graph partitioning technique by dividing the study into three parts: Basic inspiration, Graph Partitioning related preliminary work and role of evolutionary approaches in solving digital circuit layout problem. The study analyses the work of major contributors and concludes the findings
Authors and Affiliations
Maninder Kaur , Kawaljeet Singh
Keywords
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