SPURIOUS POWER SUPPRESSION TECHNIQUE FOR VLSI ARCHITECTURE
Journal Title: Indian Journal of Computer Science and Engineering - Year 2012, Vol 3, Issue 6
Abstract
Using spurious power suppression technique (SPST) in VLSI will reduce the power consumption of the system significantly. Here we are going to implement this design in Infinite Impulse Response (IIR) and Finite Impulse Response (FIR) filter architecture. When we are using this technique in this multipliers the no of partial products generated will be reduced to half which reduces the computation .Then obviously the power consumption is also reduced by this method using the Spartan 2 hardware device.
Authors and Affiliations
R. SESHADRI , Dr. S. RAMAKRISHNAN , G. HEMALATHA , V. VIJAYALAKSHMI
Keywords
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