Design of Low Power 12-bit Magnitude Comparator Journal title: The International Journal of Technological Exploration and Learning Authors: M.Amala| M.Tech (VLSI Design) Department of Electronics and Communication Engineering, Kakinada Inst... Subject(s): Engineering, Educational Technology
Recursive Approach to the Design of a Parallel Self Timed Adder Journal title: International Journal of Science Engineering and Advance Technology Authors: Kakidi Kadavath Beeran| M.Tech Student, Department of ECE, Sri Aditya Engineering College (JNTUK), S... Subject(s): Engineering, Medicine, Social Sciences, Pharmacy
Efficient New Design and Verification of Sign-Digit-Adder for Two Symmetric Redundant Radix-4 Numbers Journal title: International Journal on Computer Science and Engineering Authors: Qasem Abu Al-Haija , Yathrip Al-Zahouri , Mohammad Al-Khatib , Maamoun Ahmed Subject(s):
Modified 4-Bit Comparator Using Sleep Technique Journal title: International Journal of Computer Science & Engineering Technology Authors: Linet. K Subject(s):
AN EFFICIENT REVERSE CONVERTER DESIGN VIA PARALLEL PREFIX ADDER Journal title: International Journal of Engineering Sciences & Research Technology Authors: Vinod Subject(s):
