A BICS Design to Detect Soft Error in CMOS SRAM
Journal Title: International Journal on Computer Science and Engineering - Year 2010, Vol 2, Issue 3
Abstract
. This paper presents a Built In Current Sensor (BICS) design to detect oft error under both standby and operating condition in omplementary Metal Oxide Semiconductor (CMOS) Static Random Access Memory (SRAM). BICS connected in each column of SRAM cell array detects arious values of current signal generated by particle strike. The enerated current value s then compared with the reference value. An error signal is enerated hen it exceeds the reference value. The xisting Built In Current ensors are used to detect the soft error only at the time of standby ondition. But there is a possibility of occurrence of soft error during peration conditions also. During write operation, the soft error occurs t the time of end of the write cycle. But in read peration the error can ccur at any instant of time. Hence a BICS is esigned in such a way hat it can monitor the occurrence of soft error at any time instant of the perating condition as well as stand by ondition
Authors and Affiliations
N. M. Sivamangai , Dr. K. Gunavathi , P. Balakrishnan
Keywords
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