Abstract

This paper presents a Modified Run Length Encoding (RLE) Scheme for High Speed Data Compression. Compression is efficient technique to reduce the memory occupancy and to improve the performance of the system from many available techniques to occupancy of memory. RLE is one in substantial compression algorithm which can reduce memory use. The major improvement in compression rate and limitations and improving the speed of the system performance in RLE scheme, are discussed in this research paper. This is the new and more reliable technique for data compression. In previous traditional RLE algorithms the compression rate is limited. In order to improve compression rate with a compromise between Data recovery and allowable distance a new technique is implemented. Random sequences have been analyzed using proposed scheme, and the compression is observed. In order to store input sequences and output sequences FIFOs are used. Complete system is designed using VHDL language and is implemented on Spartan 3 FPGA.

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